Product Summary

The 74HC595N is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A. The 74HC595N is an 8-stage serial shift register with a storage register and 3-state outputs. The register has separate clocks.

Parametrics

74HC595N absolute maximum ratings: (1)VCC supply voltage: -0.5V to +7V; (2)IIK input clamping current VI < =0.5 V or VI > VCC + 0.5 V: ±20mA; (3)IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V: ±20mA; (4)IO output current VO = -0.5 V to (VCC + 0.5 V); (5)pin Q7S: ±25mA; (6)pins Qn: ±35mA; (7)ICC supply current: 70mA; (8)IGND ground current: -70mA; (9)Tstg storage temperature: -65℃ to +150℃.

Features

74HC595N features: (1)8-bit serial input; (2)8-bit serial or parallel output; (3)Storage register with 3-state outputs; (4)Shift register with direct clear; (5)100 MHz (typical) shift out frequency; (6)ESD protection: HBM JESD22-A114F exceeds 2000 V. MM JESD22-A115-A exceeds 200 V; (7)Multiple package options.

Diagrams

74HC595N block diagram

Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
74HC595N,112
74HC595N,112

NXP Semiconductors

Counter Shift Registers 8BIT SHIFT REGISTER W/OUTPUT LATCH

Data Sheet

0-1: $0.31
1-25: $0.27
25-100: $0.23
100-250: $0.20
Image Part No Mfg Description Data Sheet Download Pricing
(USD)
Quantity
74HC
74HC

Other


Data Sheet

Negotiable 
74HC/HCT02
74HC/HCT02

Other


Data Sheet

Negotiable 
74HC/HCT03
74HC/HCT03

Other


Data Sheet

Negotiable 
74HC/HCT10
74HC/HCT10

Other


Data Sheet

Negotiable 
74HC/HCT107
74HC/HCT107

Other


Data Sheet

Negotiable 
74HC/HCT109
74HC/HCT109

Other


Data Sheet

Negotiable