(Hong Kong)
Product Summary
The HD74HCT125PREL is a Quad Bus Buffer Gate with 3-state outputs. The HD74HCT125PREL requires the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125PREL requires the control input to be low to put the output into high impedance.
Parametrics
HD74HCT125PREL absolute maximum ratings: (1)Supply voltage range VCC: –0.5 to +7.0 V; (2)Input voltage VIN: –0.5 to VCC + 0.5 V; (3)Output voltage VOUT: –0.5 to VCC + 0.5 V; (4)Output current IOUT: ±35mA; (5)DC current drain per VCC, GND ICC, IGND: ±75mA; (6)DC input diode current IIK: ±20mA; (7)DC output diode current IOK: ±20mA; (8)Power dissipation per package PT: 500mW; (9)Storage temperature Tstg: –65 to +150℃.
Features
HD74HCT125PREL features: (1)LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility; (2)High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF); (3)High Output Current: Fanout of 15 LSTTL Loads; (4)Wide Operating Voltage: VCC = 4.5 to 5.5 V; (5)Low Input Current: 1μA max; (6)Low Quiescent Supply Current: ICC (static) = 4μA max (Ta = 25℃); (7) Ordering Information.
Diagrams
 |
 HD7425FPA |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
HD74AC |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
HD74AC00 |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
HD74AC02 |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
HD74AC04 |
Other |
|
Data Sheet |
Negotiable |
|
||||
|
HD74AC04FP-EL |
Other |
|
Data Sheet |
Negotiable |
|
||||
