(Hong Kong)
Product Summary
The HEF4024BT is a 7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to Q6). The counter advances on the HIGH to LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop. The HEF4024BT operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. The applications of the HEF4024BT include Frequency dividers, Time delay circuits.
Parametrics
HEF4024BT absolute maximum ratings: (1)VDD supply voltage: -0.5 to +18V; (2)IIK input clamping current VI＜-0.5 V or VI＞VDD + 0.5V : ±10mA; (3)VI input voltage: -0.5 VDD + 0.5 V; (4)IOK output clamping current VO＜-0.5 V or VO＞VDD + 0.5V: ±10mA; (5)II/O input/output current: ±10mA; (6)IDD supply current: 50mA; (7)Tstg storage temperature -65 to +150℃; (8)Tamb ambient temperature in free air: -40 +85℃; (9)Ptot total power dissipation Tamb: -40℃ to +85℃; (10)DIP14 package [1]: 750mW; (11)SO14 package [2]: 500mW; (12)P power dissipation per output: 100mW.
Features
HEF4024BT features: (1)Tolerant of slow clock rise and fall time; (2)Fully static operation; (3)5V, 10V, and 15V parametric ratings; (4)Standardized symmetrical output characteristics; (5)Specified from -40℃ to +85℃; (6) Complies with JEDEC standard JESD 13-B.
Diagrams
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 HEF4024BT,652 |
NXP Semiconductors |
Counter ICs 7-STAGE BIN COUNTER |
Data Sheet |
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HEF4024BT,653 |
NXP Semiconductors |
Counter ICs 7-STAGE BIN COUNTER |
Data Sheet |
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HEF4024BTD-T |
NXP Semiconductors |
Counter ICs 7-STAGE BIN COUNTER |
Data Sheet |
Negotiable |
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HEF4024BTD |
NXP Semiconductors |
Counter ICs 7-STAGE BIN COUNTER |
Data Sheet |
Negotiable |
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