(Hong Kong)
Product Summary
The HEF4060BT is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (RS, RTC and CTC), ten buffered outputs (O3 to O9 and O11 to O13) and an overriding asynchronous master reset input (MR). The HEF4060BT allows design of either RC or crystal oscillator circuits. The oscillator may be replaced by an external clock signal at input RS. The HEF4060BT advances on the negative-going transition of RS. A HIGH level on MR resets the counter, independent of other input conditions. Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock rise and fall times.
Parametrics
HEF4060BT absolute maximum ratings: (1) Propagation delays HIGH to LOW tPHL: 80ns type @ VDD=10V; (2) Propagation delays LOW to HIGH tPLH: 80ns type @VDD=10V; (3) Output transition times HIGH to LOW tPHL: 30ns type @ VDD=10V; (4) Output transition times LOW to HIGH tPLH: 30ns type @VDD=10V; (5) Maximum clock pulse frequency input RS: 10MHz type @VDD=10V.
Features
HEF4060BT features: (1) Dynamic power dissipation per package (P) @ VDD=5V, 10V, 15V; (2) Total power dissipation when using the on-chip oscillator (P) @ VDD=5V, 10V, 15V.
Diagrams
| Image | Part No | Mfg | Description |  |
Pricing (USD) |
Quantity | ||||||||||||
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 HEF4060BT |
Other |
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Data Sheet |
Negotiable |
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HEF4060BT,652 |
NXP Semiconductors |
Counter ICs 14ST BIN COUNTER/DIV |
Data Sheet |
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HEF4060BT,653 |
NXP Semiconductors |
Counter ICs 14-STG RC BIN CTR/DIV W/OSC. |
Data Sheet |
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HEF4060BTD |
NXP Semiconductors |
Counter ICs 14ST BIN COUNTER/DIV RIPPLE-CARRY W/OSC |
Data Sheet |
Negotiable |
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