(Hong Kong)
Product Summary
The CY23056XC-1H is a low-cost 3.3V zero delay buffer designed to distribute high-speed clocks and is available in a 16-pin SOIC or TSSOP package. The CY23056XC-1H accepts one reference input, and drives out five low-skew clocks. The -1H versions of each device operate at up to 100-/133-MHz frequencies, and have higher drive than the -1 device. All parts have on-chip PLLs which lock to an input clock on the REF pin. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The CY23056XC-1H has two banks of four outputs each, which can be controlled by the Select inputs as shown in the “Select Input Decoding” table on page 2. If all output clocks are not required, Bank-B can be three-stated. The select inputs also allow the input clock to be directly applied to the outputs for chip and system testing purposes.
Parametrics
CY23056XC-1H absolute maximum ratings: (1)Supply Voltage to Ground Potential:–0.5V to +7.0V; (2)DC Input Voltage (Except REF):–0.5V to VDD + 0.5V; (3)DC Input Voltage REF:–0.5V to 7V; (4)Storage Temperature:–65℃ to +150℃; (5)Junction Temperature: 150℃; (6)Static Discharge Voltage (per MIL-STD-883, Method 3015): ＞2,000V.
Features
CY23056XC-1H features: (1)10 MHz to 100/133MHz operating range, compatible with CPU and PCI bus frequencies; (2)Zero input-output propagation delay; (3)60 ps typical cycle-to-cycle jitter (high drive); (4)Multiple low-skew outputs; (5)85 ps typical output-to-output skew; (6)One input drives five outputs (CY2305); (7)One input drives nine outputs, grouped as 4 + 4 + 1 (CY2309); (8)Compatible with Pentium-based systems; (9)Test Mode to bypass phase-locked loop (PLL) (CY2309 only see "Select Input Decoding" on page 2); (10)Available in space-saving 16-pin 150-mil SOIC or 4.4-mm TSSOP packages (CY2309), and 8-pin, 150-mil SOIC package (CY2305); (11)3.3V operation; (12)Industrial temperature available.
Diagrams
 |
 CY2302SC-1 |
Cypress Semiconductor |
Phase Locked Loops (PLL) Spread Aware COM Zero Delay Buffer |
Data Sheet |
Negotiable |
|
||||||||||||
|
CY2302SXC-1T |
Cypress Semiconductor |
Phase Locked Loops (PLL) Spread Aware COM Zero Delay Buffer |
Data Sheet |
|
|
||||||||||||
|
CY2302SXI-1T |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3VZDB IND |
Data Sheet |
|
|
||||||||||||
|
CY2304NZZI-1 |
Cypress Semiconductor |
Clock Buffer 3.3V 133MHz IND |
Data Sheet |
Negotiable |
|
||||||||||||
|
CY2304SXC-2 |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3VZDB COM |
Data Sheet |
|
|
||||||||||||
|
CY2304SXI-1T |
Cypress Semiconductor |
Phase Locked Loops (PLL) 3.3V Zero Delay Buffer |
Data Sheet |
|
|
||||||||||||
